
74HC75 High-Speed Si-gate CMOS Device
High-speed Si-gate CMOS device pin compatible with LSTTL, featuring four bistable latches.
- Complies with: JEDEC standard no. 7A
- Number of Latches: 4
- Enable Inputs: LE12 and LE34
- Propagation Delay: 11 ns
- Input Capacitance: 3.5 pF
- Power Dissipation Capacitance per latch: 42 pF
Features:
- Complementary Q and Q outputs
- VCC and GND on center pins
- Low-power dissipation
- ESD protection: HBM EIA/JESD22-A114-B exceeds 2000V, MM EIA/JESD22-A115-A exceeds 200V
The 74HC75 is a high-speed Si-gate CMOS device that is pin-compatible with low power Schottky TTL (LSTTL). It has four bistable latches controlled by active HIGH enable inputs LE12 and LE34. The data enters the latches and appears at the nQ outputs when the corresponding LEnn input is HIGH. The latched outputs remain stable as long as the enable inputs are LOW. Data on the nD inputs one set-up time prior to the transition of the enable inputs will be stored in the latches.
The 74HC75 is specified to operate from -40°C to +80°C and -40°C to +125°C.
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