74HC138 Decoder
Advanced CMOS decoder with high noise immunity and low power consumption.
- Typical propagation delay: 20 ns
- Wide power supply range: 2V–6V
- Low quiescent current: 80 µA maximum (74HC Series)
- Low input current: 1 µA maximum
- Fanout: 10 LS-TTL loads
The 74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features high noise immunity and low power consumption typically associated with CMOS circuitry while offering speeds comparable to low-power Schottky TTL logic.
The 74HC138 has 3 binary select inputs (A, B, and C). When enabled, these inputs determine which one of the eight normally HIGH outputs will go LOW. It comes with two active LOW and one active HIGH enables (G1, G2A, and G2B) for easy cascading of decoders. The outputs can drive 10 low power Schottky TTL equivalent loads and are functionally and pin equivalent to the 74LS138. All inputs are protected from static discharge damage by diodes to VCC and ground.
- Supply Voltage: 0.5 to +7.0V
- DC Input Voltage: 1.5 to VCC + 1.5V
- DC Output Voltage: 0.5 to VCC + 0.5V
- Clamp Diode Current (IIK, IOK): ±20 mA
- DC Output Current, per pin (IOUT): ±25 mA
- DC VCC or GND Current, per pin (ICC): ±50 mA
- Storage Temperature Range: -65°C to +150°C
- Power Dissipation (PD): 500 mW
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*Images are for illustration only; actual product may vary.