74HC164 8-Bit Shift Register
Advanced silicon-gate CMOS technology with high noise immunity and low power consumption.
- Typical operating frequency: 50 MHz
- Typical propagation delay: 19 ns (clock to Q)
- Wide operating supply voltage range: 2V to 6V
- Low input current: 1 µA maximum
Features:
- High noise immunity
- Low power consumption
- Comparable speeds to low power Schottky devices
- Gated serial inputs with CLEAR
This 8-bit shift register has gated serial inputs and CLEAR. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A LOW at either or both inputs inhibits entry of new data and resets the first flip-flop to the low level at the next clock pulse. A high level on one input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is HIGH or LOW, but only information meeting the setup and hold time requirements will be entered. Data is serially shifted in and out of the 8-bit register during the positive going transition of the clock pulse. Clear is independent of the clock and accomplished by a low level at the CLEAR input. The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Specifications:
- Supply Voltage (VCC): 2-6 V
- DC Input or Output Voltage (VIN, VOUT): 0-Vcc V
- Operating Temperature Range (TA): -40 to 85 °C
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Input Rise or Fall Times:
- VCC = 2.0V: 1000 ns
- VCC = 4.5V: 500 ns
- VCC = 6.0V: 400 ns
Related Document: 74HC164 IC Datasheet
* Images are for illustration only; actual product may vary.